AR# 13325


4.2i Project Navigator - "Error: This design does not contain an entity named entity_name..." is reported when I attempt to create a schematic symbol


Keyword: ISE, 4.1i, ABEL, HDL, CONVERTER, create, schematic, symbol, Spartan

Urgency: Standard.

General Description:
When I create a schematic symbol from an ABEL file that was converted to VHDL by HDL CONVERTER, the following error is reported in the console window:

"Analyzing VHDL source files...
Elaborating design unit procwhdot...
FATAL ERROR: VHDL Analyzer detecting a syntax error. Description of the error is:
procwhdot.vhd(205): Syntax error at or near: '('
Please correct this syntax error and try again..."

"ERROR: This design does not contain an entity named procwhdot...
vhdtdtfi completed with errors...

Done: failed with exit code: 0001."


Although the VHDL file syntax may be correct, HDL Parser (a sub-program used to create schematic symbols) cannot process the syntax.

Three known syntax structures can cause HDL Parser to not successfully process a VHDL file:

1. A generate statement;
2. If the file contains "component" in the instantiation;
3. Certain "std_logic_vector" declarations.

To work around this problem, change the VHDL code and create the schematic symbol. Once the symbol has been generated, you must correct the VHDL code back to the original version to avoid errors during synthesis.

For the three cases above:

1. Remove the generate statement for the symbol creation. (Be sure to add it back for synthesis.)
2. Remove "component" from the instantiation. The word "component" is not needed in the instantiation for synthesis.
3. Change " std_logic_vector'( " to " std_logic_vector" for the symbol creation. (Be sure to add it back for synthesis.)
AR# 13325
Date 08/11/2003
Status Archive
Type General Article
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