Whenever PROHIBIT constraint is used in the UCF file to constraint the pins in row P, Xilinx tool gives
out a warning message during implementation:
WARNING:CPLD- Ignoring user-specified PROHIBITed pin P(xx). The pin does not exist
on this device.
This warning message can be safely ignored since it is misleading. The pin on row P do exist on the
95288/XL/XV devices. Moreover, if one examine the fitter report (*.rpt files) carefully, the PROHIBIT
constraint is actually being applied to the pin P(xx) as seen in the "Device Pin Out" part in the
fitter report file.