To assign a preload value to a register, use the following equation in the EQUATIONS section of the ABEL file:
<data>.ap = 0; "For Preset (output high)
<data>.ar = 0; "For Reset (output low)
where <data> is the name of the register declared in the DECLARATIONS section.
Note that only the XC4000 family actually has both a PRE and a CLR pin on the registers. Only one or the other of these 2 pins may be used for a given flip-flop, however. The XNF file which is generated by ABL2XNF will include a D-Flip-Flop, whose INIT value is either 'R' for reset, or 'S' for set/preset.
This will ensure that the flip-flop is in the desired state when the device is powered-up, and when the Global Set/Resest is asserted. Note: to specify a specific signal as the GSR signal, the STARTUP symbol must be placed on the schematic with the desired GSR signal tied to the GSR pin on the STARTUP block. There is no way to put the STARTUP block into the ABEL file.
For the other FPGA families, the registers only have a Clr pin, and thus really only have the ability to preload to a Reset or 0 state. However, if you do use the .ap extension shown above to achieve a preload value of 1, ABL2XNF will simply invert the input and output of the 'reset' flip-flop to emulate a 'preset' flip-flop.
In either case, the CLR or PRE pin on the D-flip-flop will be tied to ground. XNFPREP will later trim out that signal to ground, as it is unnecessary.