We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 13515

4.1i sp3 Timing Analyzer - "WARNING:Timing:2541 - c1_s5_rx_a_clk does not clock any primary output"


Keywords: Timing, Analyzer, 4.1, sp3, timing, 2541

Urgency: Standard

General Description:
When I run Timing Analyzer on a design in 4.1i with Service Pack 3 applied, the following warnings are reported:

"Starting initial Timing Analysis. REAL time: 2 mins 16 secs
WARNING:Timing:2541 - c1_s5_rx_a_clk does not clock any primary output
WARNING:Timing:2542 - Constraint ignored: OFFSET = IN 10 nS BEFORE COMP "c1_s5_rx_a_clk" ;"


The message should report that it "...does not clock any primary input" instead of the incorrect message, "...does not clock any primary output."

This will be fixed in the next major release of the software.
AR# 13515
Date 08/12/2003
Status Archive
Type General Article
Page Bookmarked