AR# 13801

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7.1i XST - "ERROR:Xst:853 - Unsupported item in port list for module <module_name>"

Description

Keywords: Verilog, HDL, port, list, XST

Urgency: Standard

General Description:
XST reports the error below when I attempt to describe an "anonymous port" in Verilog 2001, or when a Verilog sub-module has a port list with port widths as follows:

module my_ff(clk,ff_in[7:0],rst,ff_out[7:0],en);
input clk;
....etc

"ERROR:Xst:853 - Unsupported item in port list for module <module_name>"

Solution

1

Anonymous Port

NOTE: You can use an anonymous port to describe ports that have no internal connection. This is useful when your design is implemented with a pre-determined interface (set of ports), but the design does not need to connect to one or more ports internally.

Example of an anonymous port:

module ff (d, clk, q, );

The empty space after the port "q" is the anonymous port. XST does not currently support anonymous ports.

2

Port Width Declared in the Port Listing
Declaring port widths in the port listing is standard Verilog coding; however, declaring ports widths in the port listing is not currently supported in Verilog sub-modules. To work around this issue, declare the widths of the ports in the port declarations and not in the port lists.
AR# 13801
Date 10/23/2008
Status Archive
Type General Article
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