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AR# 14255

4.1i XST - "ERROR:Xst:996 - <file>.v Line xx. Undefined Text Substitution macro '<instance>'"

Description

Keywords: XST, 996, undefined, substitution, Verilog, include

Urgency: Standard

General Description:
When I compile a Verilog design with XST, the following error occurs:

"ERROR:Xst:996 - <file>.v Line xx. Undefined Text Substitution macro '<instance>'."

Solution

Text substitutions can be used to allow for parameterization of many parts of a design, but they must be defined before they are used.

Here is a simple example:

<code>
module top (clk, din, dout);
input clk;
`define WIDTH 8 //error will occur without this declaration
input [`WIDTH-1:0] din;
output [`WIDTH-1:0] dout;
reg [`WIDTH-1:0] dout;

always@(posedge clk)
dout = din;

endmodule
<code>

This text declaration using the `define statement can be placed anywhere before it is used. It can also be placed in a separate .v or .h file that is referenced via an `include statement.

According to the Verilog IEEE specification, the text declaration must be global as soon as it is read into the project. XST will read in the lower-level files before reading in the top-level files, so if a text declaration is defined in the top-level file but is used in a lower-level file, XST will issue this error. It is a good practice to use an `include file that contains all of your text substitutions.
AR# 14255
Date Created 03/20/2002
Last Updated 08/06/2003
Status Archive
Type General Article