When I synthesize a Verilog design with XST, the following warning is reported:
"WARNING:Xst:878 - "<file>.v", line xx: Unrecognized directive. Ignoring."
This warning occurs when XST finds a compiler directive that it cannot process. Typically, these are initiated with the "synopsys" keyword, as follows:
// synopsys attribute fpga_dont_touch "true"
In most cases, these directives for Synopsys Verilog compilers are not required by XST. To avoid the warning, you can remove these directives or change the keyword from "synopsys" to "synthesis."
For a list of third-party attributes and their XST equivalents, see the XST User Guide, available at: