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AR# 14359

7.1i XST - How do I pass the STEPPING attribute through HDL in XST?


How do I pass the STEPPING attribute that is available to access the enhanced multiplier speed?


VHDL Example: 


entity multiply is  

port (<port_list>);  


attribute STEPPING : string;  

attribute STEPPING of multiply : entity is "1";  

end multiply;  



Verilog Example: 


module multiply (<port_list>); //synthesis attribute STEPPING of multiply is 1  




For more information about the STEPPING attribute, see (Xilinx Answer 14339).

AR# 14359
Date 05/14/2014
Status Archive
Type General Article
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