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AR# 14426

4.2i CORE Generator - Parameters do not appear in the GUIs of certain older cores (Dist Mem v1_0, SP Block Mem v1_0, DP Block Mem v1_0)

Description

Keywords: COREGen, distributed, memory, single, dual, port, block, E_IP2, IP, update

Urgency: Standard

General Description
When the following cores are opened in CORE Generator, the core parameters do not appear in the customization GUIs, and the cores cannot be generated.

Affected Cores:

Distributed Memory v1.0
Dual-Port Block Memory v1.0
Single-Port Block Memory v1.0

Solution

These cores will become obsolete in the next major release of the Xilinx software.

Please use the newer versions of these cores.
AR# 14426
Date Created 04/08/2002
Last Updated 10/08/2003
Status Archive
Type General Article