AR# 14529


5.2i XST - What is the default direction for XST with unbounded std_logic_vectors?


Keywords: XST, VHDL, std, logic, unbounded, bound, direction, to, downto

Urgency: Standard

General Description:
It is common to not 'bind' std_logic_vectors when they are the parameters of a function or are used in generics as in the following example:

function and_reduce(V : std_logic_vector) return std_logic is

The parameter 'V' is not bound (the size and direction of the array is not specified). XST will choose 'downto' instead of 'to' as the direction, which is contrary to the VHDL specification.


This problem is fixed in the latest 5.2i Service Pack available at:

The first service pack containing the fix is 5.2i Service Pack 2.
AR# 14529
Date 10/20/2005
Status Archive
Type General Article
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