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AR# 14719

Parallel Cable IV - How much setup time does the Parallel Cable IV provide on TMS and TDI? What is the setup requirement on the cable TDO pin?


How much setup time does the Parallel Cable IV provide on the TMS and TDI output pins, and what is the setup requirement on the cable TDO input?


TMS and TDI: 

The Parallel Cable IV drives the TMS and TDI signals on the falling edge of the previous clock pulse, so the setup time provided by the cable is a function of TCK frequency.

The default TCK frequency is 5 MHz, so the cable drives TDI and TMS valid 100 ns prior to the rising TCK edge.  



For 5 MHz TCK operation (worst-case scenario), the cable requires -42 ns setup time and 88 ns hold time on the TDO signal (with respect to the rising TCK edge). 

Although the -42 ns setup time on TDO seems incorrect, it is valid. TDO is driven by the last device in the chain on the falling TCK edge, and the Parallel Cable IV does not sample it until just before the next falling TCK edge.

This information, along with a timing diagram, will be added to a future revision of the Parallel Cable IV data sheet. 


For information on the Parallel Cable III, please refer to (Xilinx Answer 9803)

For the maximum JTAG clock frequency supported by device architecture, please see (Xilinx Answer 8796).

AR# 14719
Date 02/01/2018
Status Active
Type General Article
Boards & Kits
  • Xilinx Parallel Cable IV
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