Slew-rate can be specified on I/O after the design has been elaborated in FPGA Express.
After elaborating the design (before optimization), right-click on the implemented design and select 'Edit Constraints'. This will bring up the constraints window.
The 'Ports' tab will list all the pins for a given design. There is a column in this display called 'Slew Rate'. Selecting the row that corresponds to the pin you want, left-click on the box under the Slew Rate column and select Slow or Fast. Modify the top row to change the default value.
Note: slew rate can only be specified on ports of type output or inout in FPGA Express