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AR# 14861

LogiCORE FFT - Simulation of all fixed netlist FFTs (64, 256, 1024) cores generates many warnings

Description


During the simulation of the FFT cores, the warnings listed below are reported. The cores that generate these warnings are the fixed netlist FFTs (64, 256, 1024pt). The warnings are generated on every clock edge and include:



"Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es)."

"Warning: Memory Hazard: Write enable is not defined at the rising clock edge."

"Warning: Undefined input ADDRA. Setting output DOUTA to X"

Solution

You can safely ignore these warnings. They are reported because the FFT is a block algorithm and is implemented in a serial loop engine fashion. Consequently, the data flow is not a continuous operation, and this leads to redundant arithmetic that is occurring constantly during simulation. Since different sections of the FFT only require some of the time, periodically there are X's in the redundant operations. Also, reading and writing at the same time is legitimate. Additionally, since simulation of a known good FFT generates these warnings, you can definitely safely ignore these messages.

AR# 14861
Date Created 08/29/2007
Last Updated 12/02/2011
Status Archive
Type General Article