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AR# 16114

LogiCORE CORDIC v1.1 - During a Synopsis VHDL analyzer compilation, an error reports "Analysis Parsing vhdl-481"


The CORDIC behavioral model currently uses the IEEE numeric_bit package. When the CORDIC behavioral model is compiled using Synopsys VHDL Analyzer (VHDLAN), a failure occurs because Synopsys does not include the library "IEEE.numeric_bit".

When I compile my design using the Synopsys tools, the following error occurs:

"USE ieee.numeric_bit.ALL;


Error: analysis Parsing vhdl-481


No selected element named NUMERIC_BIT is defined for this prefix."


If you are using the Synopsys compiler, you can work around this issue by using the VHDL structural netlist instead of the CORDIC behavioral model. Create the structural netlist by running VHDL back-annotation on the post-translate NGD file.

This problem will be fixed in CORDIC v2.0 in 5.1i IP Update #2.

Please see (Xilinx Answer 29570) for a detailed list of LogiCORE CORDIC Release Notes and Known Issues.

AR# 16114
Date 12/15/2012
Status Active
Type General Article