AR# 16216: 3.1 EDK - Platform Generator generates an incorrect VHDL file for an OPB ATMC core
3.1 EDK - Platform Generator generates an incorrect VHDL file for an OPB ATMC core
Keywords: PlatGen, EDK, SP2, OPB ATMC, VHDL
General Description: The top-level system.vhd file generated by PlatGen contains incorrect connections to the IBUF/OBUF for the ATMC "rx" and "tx" address and "rx" data ports. The buffers are connected to the signals called "*_IBUF" when they should be connected to signals called "*_I".
This problem causes XST to fail and report the following error:
"ERROR: HDLParsers:821 - /proj/swop3/roms/results/F.24.0/virtex2p/mpd/sol/opb_atmc_v1_00_b/run/hdl/system.vhd Line 1556. Wrong index type for inst_opb_atmc_txaddr_ibuf."