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AR# 16234

5.1i Timing Simulation, NGDAnno, MAP - Generating a simulation netlist when using the "-u" option in MAP

Description

Keywords: NGDAnno, Timing, Simulation, MAP, -u, unconnected, ports

Urgency: Standard

General Description:
When a partially completed design is implemented, the "-u" option can be used in MAP to prevent the trimming of unconnected signals. Ideally, all inputs and outputs from a partially completed design would be connected to pads, which prevents the need for the "-u" option. However, in actual designs, some of these inputs and outputs are connected to internal logic; by connecting these inputs and outputs to pads, the net delay going to the pads and the I/O delay on the pads cause the simulation to be an inaccurate representation of the way the partially completed design will work when the remainder of the design is implemented.

When the "-u" option is used, NGDAnno connects the unconnected signals to ports, allowing the design to be simulated. In the 5.1i software, NGDAnno no longer connects these unconnected signals to ports.

Solution

1

For the 5.1i software, we suggest that you create a "dummy" top level in the design that connects all inputs and outputs from the partially completed design to ports. Then, apply a KEEP_HIERARCHY constraint to the partially completed portion of the design. The KEEP_HIERARCHY constraint will preserve the hierarchy on the portions of the design to which it is attached and allow a hierarchical simulation netlist to be created. Since the partially completed design will be represented as a level of hierarchy in the simulation netlist, the testbench can provide stimulus to this level of hierarchy and observe the outputs from this level of hierarchy; this gives a proper representation of how the partially completed design will function when the rest of the design is implemented.

The following two issues with the KEEP_HIERARCHY constraint can prevent a user from successfully using the KEEP_HIERARCHY methodology:

1. In 5.1i NGDAnno with Service Pack 2, an error reports: "ERROR:Anno:297 - fragment ("i" (tag=6 in view "FRAGCOVERED")) has parent ("level1" ...) does not match." Please see (Xilinx Answer 16228) for more information.
2. In the 5.1i software with Service Pack 2, for NGDAnno, NGD2VHDL, NGD2VER, KEEP_HIERARCHY: In hierarchical blocks, extra ports with "\$s_annotrans_" are created, and a number of ports are left floating. Please see (Xilinx Answer 16181) for more information.

Both of these issues are fixed in 5.1i Service Pack 3, which will be available in mid-December, 2002. Until 5.1i Service Pack 3 becomes available, you may use the work around below.

2

In an application that cannot immediately switch to the KEEP_HIERARCHY methodology, the following environment variable can be used to enable NGDAnno for the 4.2i Service Pack 3 and later versions:

Workstation:
setenv XIL_ANNO_ENABLE_4_2i_FLOW 1

PC:
set XIL_ANNO_ENABLE_4_2i_FLOW=1

After this environment variable is set, the "-u" option can be used in MAP, and NGDAnno will connect the unconnected signals to ports.

NOTE 1: The "-u" option should only be used to demonstrate how a partially completed design will function in simulation. The "-u" option should never be used when a complete design is implemented and should never be used when a bit file that will be downloaded to a device is generated.

NOTE 2: This environment variable will not be available in the 5.1i software release. Please switch to the KEEP_HIERARCHY methodology as soon as possible. Additionally, setting this environment variable prohibits the user from using any of the 5.1i features in NGDAnno.
AR# 16234
Date Created 11/23/2002
Last Updated 08/11/2005
Status Archive
Type General Article