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AR# 1632

Errors occur during the optimize stage of implementation


Keywords: 7318, 7336, fclk, fast function block, fast clock, hi317, nd100, nd104

Urgency: Standard

General Description:
Upon implementing a XC7318 or XC7336 design, the following errors are encountered during the optimize stage of implementation:

nd100:[Error]Could not map '<instance>' into a fast function block macrocell.
nd104:[Error]Device does not have enough fast clocks to convert macrocell pterm clock into a fast clock as required for fast function blocks.
hi317:[Error]Invalid fast function mapping requirement found. Possibly there is too much logic declared as fast in your design.

This error is typically caused by a design that targets the XC7318 or the XC7336 and uses more than two device clocks. Since the XC7318 and XC7336 have only Fast Function Blocks, the device may only have 2 clocks. This is because the clocks in Fast Function Blocks can come from one of two places, the FCLK0 pin or the FCLK1 pin. Even if the design generates a clock signal internally, the clock signal will still need to use one of these 2 FCLK pins to get back into the device on a clock line.

There are no product term clocks in Fast Function Blocks

Therefore, if the design has an internally generated clock(s), a FCLK pin must be left free for each of those internally generated clock(s).



Target a 7300 device that contains High Density Function Blocks (such as the 7354 device or larger).

You may also try targeting an equivalent 9500 device.


Limit the number of clocks in the design to 2.


If the design contains an internally generated clock(s), be sure that there is a corresponding FCLK pin available for the clock to use to get onto the clock line.
AR# 1632
Date 09/30/2005
Status Archive
Type ??????
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