When I run the "Check Schematic" process, the following error occurs:
"Error Bus 'xxx' and its sub-bus are connected to different I/O ports."
However, there do not appear to be any problems with the schematic.
This error is valid if a member (or members) of an I/O bus is attached to its own I/O port.
The bus mybus (4:0) is connected to an input port, and mybus (4) is also connected to its own input port.
If the design appears to be correct and this error is still reported, please open a WebCase with Xilinx Customer Support at:
If erroneous data exists in the schematic file, it can generally be filtered out by cutting and pasting all visible elements of a schematic sheet as follows:
1. Use your mouse to select everything on the schematic.
2. Click the "Cut" button.
3. Click the "Paste" button and paste the schematic.
4. If you perform the "Check Schematic" process, the error should not be reported.