UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 16511

LogiCORE RapidIO - Table 2-4 of the Logical (I/O) and Transport Interface Design Guide v1.3 incorrectly lists IREQ_STATUS_I[0:3]

Description

General Description: 

Table 2-4 of the Logical (I/O) and Transport Interface Design Guide v1.3 lists IREQ_STATUS_I[0:3]. Does this signal exist?

Solution

No, this is an error in the design guide. There is no status on a request -- status is only used for responses (e.g., TRESP and IRESP).

AR# 16511
Date Created 09/03/2007
Last Updated 05/15/2014
Status Archive
Type General Article