Flip-flop does not reset when it is packed in the same slice with SRL16E or distributed RAM.
The hardware does not support connecting the CE (clock enable) pin of the SRL16E and the R (reset) pin of the FDRE in the same slice. Similarly, the WE pin of the distributed RAM cannot be connected to the R pin of the FDRE in the same slice.
This is a hardware limitation issue. There is one memory cell that toggles the SR pin of the slice between enabling the CE/WE of shift register/distributed RAM and enabling the R to the flip-flops.