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AR# 17332

LogiCORE SPI-4.2 (POS-PHY L4) - How do I program the calendar of PL4 Sink and Source core? How do I use the calendar signals?

Description

General Description:  

This Answer Record provides advice on calendar programing of the Xilinx SPI-4.2 core, and answers the following questions: 

 

- Why do I need to perform calendar programming? 

- Is it always necessary to perform calendar programing at start-up? 

- How do I specify the calendar length? 

- How are SnkCalendar_M and SrcCalendar_M used? 

- What do I do with the calendar control signals when I am not programming? 

- How do I perform calendar programming?

Solution

Why do I need to perform calendar programming? 

When the PL4 core is configured as a multi-channel core, you must define the channel sequence order for receiving the status (TStat or RStat). (In previous POS-PHY or UTOPIA devices, the polling method was used to get the status.) However, in SPI-4.2, this polling method is replaced by "calendar sequencing." In this method, you initialize the sink and source core with the same calendar sequence to send and receive the channel status in a predefined order. 

 

Is it always necessary to perform calendar sequence programing at the start-up? 

No, if you have a single channel core, and your calendar length is only one, it is not necessary to perform calendar programming. If you need to re-program the calendar sequence after the start-up, you must first disable the cores (SnkEn, SrcEn = "0"). 

 

Also, as an alternative to calendar programming, you can specify the calendar sequence in a COE file. Then, during the core generation, you can load the COE file in the SPI-4.2 GUI. For more information, see the SPI-4.2 (PL4) Core product specification in the "Calendar COE File Format" section, located at: 

http://support.xilinx.com/ipcenter/catalog/logicore/docs/spi4_2_product_spec.pdf
 

The calendar sequence specified in the COE file is automatically transferred to the "wrapper.ucf" file as the BRAM INIT string. If you must modify the calendar sequence, Xilinx recommends modifying the COE file and regenerating the core, since it is more difficult to modify the INIT strings in the UCF. 

 

How do I specify the calendar length? 

Xilinx SPI-4.2 can be configured as a 1- to 256-channel core. However, the calendar length can be defined as 1 to 512 entires. You can set the calendar length in the SPI-4.2i GUI during the core generation. You can also modify this by changing the Static Configuration parameters SnkCalendar_Len and SrcCalendar_Len in your wrapper file. 

 

NOTE: Actual length is SnkCalendar_Len +1. Consequently, if your SnkCalendar_Len is set to "0", the actual calendar length is 1.  

 

How are SnkCalendar_M and SrcCalendar_M used? 

These parameters are used to specify to the Sink and Source cores how many times the calendar sequence is repeated before inserting DIP2 and framing words. For information on the correct usage of these parameters, see the SPI-4.2 (PL4) Core product specification at: 

http://support.xilinx.com/ipcenter/catalog/logicore/docs/spi4_2_product_spec.pdf
 

What do I do with the calendar control signals when I am not programming? 

When you are not programming the calendar sequence or are not calendar programming at all, tie off all the calendar programming input signals (*CalClk, *CalWrEn_n, *CalAddr[8:0], *CalData[7:0]) to appropriate levels. *CalWrEn_n should be always "1", and the other signals can be either "1" or "0". 

 

How do I perform calendar programming? 

Please see the "Sink Calendar Initialization" and the "PL4 Calendar Programming" sections in the SPI-4.2 (PL4) Core product specification at: 

http://support.xilinx.com/ipcenter/catalog/logicore/docs/spi4_2_product_spec.pdf

AR# 17332
Date Created 09/03/2007
Last Updated 05/15/2014
Status Archive
Type General Article