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AR# 17519

6.1i ECS - TC goes high when clear is asserted on the macro CC16CCLED


Keywords: CC16CCLED, TC, clear, terminal, count, ECS, ecs

Urgency: Standard

General Description:
TC goes high when clear (CLR) is asserted on the macro CC16CCLED? The software manual states that TC should go low.


This is an error in the CC16CCLED schematic macro. This will be fixed in the next major software release.

A work-around to this issue is to take the VHDL or Verilog code from the software manual, create a black box of this code, create a schematic symbol, and use this in your schematic design.

Alternatively, the intermediate HDL file (".vhf" or ".vf") would need to be edited to show proper functionality.
AR# 17519
Date 01/08/2006
Status Archive
Type General Article
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