1. How do I use the DCR?
2. I have pulled the DCR signals from a PPC405 to and external port for my embedded system. Within my DCR slave interface I attempt to read and write, but the read and write pulses terminate prematurely. There is no visible ACK, and I am within the 64 clock cycle response time (i.e., DCR bus timeout).
There are 3 ways to use the DCR from the PPC405:
1. Use the OPB2DCR bridge.
2. Use the DCR bus.
3. Use the PPC405 DCR signals pulled out externally to attach slaves.
When using the DCR in any fashion, keep in mind that there are two DCR bus loops when referring to the DCR. The first loop is internal to the PPC405 gasket and is not visible by the end user. The second DCR bus loop is outside the PPC405 gasket.
The internal DCR bus loop is used for the ISOCM and DSOCM DCR registers. The external DCR bus loop is used for user DCR registers. Even though there are two bus loops for the DCR, the DCR address space is the same. Therefore, the ISOCM and DSOCM DCR registers are mapped with user-defined DCR registers.
The ISOCM and DSOCM both have DCR registers internal to the PPC405 gasket. The ISOCM uses four DCR registers (ISCNTL, ISARC, ISINIT, and ISFILL), and the DSOCM uses two DCR registers (DSCNTL and DSARC). See page 96 of the "ppc405block_ref_guide.pdf" for information on the DCR interface. See page 135 of the "ppc405block_ref_guide.pdf" for details on the ISOCM and DSOCM DCR registers.
When the ISOCM and DSOCM are used, whether or not you intend to use the ISOCM and DSOCM DCR registers, there are two 8-bit signals that are hard-coded and fixed to determine the base address of the ISOCM and DSOCM DCR registers. The two 8-bit signals are the TIEISOCMDCRADDR and the TIEDSOCMDCRADDR.
TIEISOCMDCRADDR = 00 0010 11
address of ISINIT = 00 0010 1100 = 0x02C
address of ISFILL = 00 0010 1101 = 0x02D
address of ISARC = 00 0010 1110 = 0x02E
address of ISCNTL = 00 0010 1111 = 0x02F
TIEDSOCMDCRADDR = 00 0001 11
address of DSARC = 00 0001 1110 = 0x01E
address of DSCNTL= 00 0001 1111 = 0x01F
The above example shows the TIEISOCMDCRADDR and TIEDSOCMDCRADDR fixed to 0x0B and 0x07, respectively. The example also shows how the 8 bits for the TIEISOCMDCRADDR and TIEDSOCMDCRADDR are extended to 10 bits in order to memory-map them for the DCR address space. (For this example and explanation, the DCR address space is its own space and is not to be confused with the overall system address space (memory map).)
Therefore, within the DCR address space (or memory map) there would be 1018 (2^10 = 1024 total available, 1024 - 6 = 1018) 10-bit addresses that can be used as DCR slave registers. The overall use for the DCR slave registers would be to use the unused 1018 address and not to use the 6 addresses used by the ISOCM and DSOCM DCR registers.