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AR# 18223

9.1i EDK - OPB EMC: tAW has a different value than the value specified in the MHS file

Description

Using an OPB EMC in an EDK design, I specify the value of the tAW as 90 ns (as shown below). The timing result is 175 ns in simulation, with an oscilloscope I measure of 900 ns. 

 

C_WRITE_ADDR_TO_OUT_SLOW_PS_0 = 90000  

 

In my MHS file, the OPB EMC is configured as follows: 

 

 ## OPB EMC Snippet: 

BEGIN opb_emc 

PARAMETER INSTANCE = opb_emc_flash 

PARAMETER HW_VER = 1.10.b 

PARAMETER C_NUM_BANKS_MEM = 1 

PARAMETER C_INCLUDE_NEGEDGE_IOREGS = 0 

PARAMETER C_MEM0_WIDTH = 8 

PARAMETER C_MAX_MEM_WIDTH = 8 

PARAMETER C_INCLUDE_DATAWIDTH_MATCHING_0 = 0 

PARAMETER C_SYNCH_MEM_0 = 0 

PARAMETER C_READ_ADDR_TO_OUT_SLOW_PS_0 = 0 

PARAMETER C_WRITE_ADDR_TO_OUT_SLOW_PS_0 = 90000 

PARAMETER C_WRITE_MIN_PULSE_WIDTH_PS_0 = 50000 

PARAMETER C_READ_ADDR_TO_OUT_FAST_PS_0 = 90000 

PARAMETER C_WRITE_ADDR_TO_OUT_FAST_PS_0 = 90000 

PARAMETER C_READ_RECOVERY_BEFORE_WRITE_PS_0 = 5000 

PARAMETER C_WRITE_RECOVERY_BEFORE_READ_PS_0 = 5000 

PARAMETER C_OPB_CLK_PERIOD_PS = 25000 

PARAMETER C_DEV_MIR_ENABLE = 0 

PARAMETER C_BASEADDR = 0xFF7FFFE0 

PARAMETER C_HIGHADDR = 0xFF7FFFFF 

PARAMETER C_MEM0_BASEADDR = 0xFF800000 

PARAMETER C_MEM0_HIGHADDR = 0xFFBFFFFF 

PORT Mem_A = opb_emc_flash_Mem_A 

PORT Mem_RPN = opb_emc_flash_Mem_RPN 

PORT Mem_DQ = opb_emc_flash_Mem_DQ 

PORT Mem_WEN = opb_emc_flash_Mem_WEN 

PORT Mem_OEN = opb_emc_flash_Mem_OEN 

PORT Mem_BEN = opb_emc_flash_Mem_BEN 

PORT Mem_CEN = opb_emc_flash_Mem_CEN 

BUS_INTERFACE SOPB = myopb_v20 

END 

 

 ## End MHS Snippet

Solution

Consider the following issues for the timing parameter calculation: 

 

For the parameter C_WRITE_ADDR_TO_OUT_SLOW_PS_0 ( tAW ), the calculation is performed as shown below, using a clock period of 25 ns.  

 

The resulting value for tAW is as follows: 

tAW = (C_WRITE_ADDR_TO_OUT_SLOW_PS_0[Clock Period] + 4) * Clock Period  

The initial setting is 90 ns; in timing simulation, the result is 175 ns:  

=> tAW = (90ns[25ns] + 4) * 25ns = (3+4) * 25ns = 7 * 25ns = 175 ns.  

 

For the parameter C_WRITE_MIN_PULSE_WIDTH_PS_0 ( tWP ), the calculation is performed as shown below according to a clock period of 25 ns.  

The value for tWP is:  

tWP = tAW - 2 * Clock Period  

=> tWP = 175 ns - 50 ns  

=> tWP = 125 ns  

 

The above is an example explanation of the previous results. The following is an example of the correct calculations.  

 

tAW = 90 ns is not possible because the tAW must be rounded to the nearest multiple of the clock period, which is 100 ns.  

Consequently, applying the equation:  

tAW = (C_WRITE_ADDR_TO_OUT_SLOW_PS_0[Clock Period] + 4) * Clock Period = 100 ns  

=> C_WRITE_ADDR_TO_OUT_SLOW_PS_0[Clock Period] = 0  

Any value less than the clock period works, for example:  

==> C_WRITE_ADDR_TO_OUT_SLOW_PS_0 = 10000 ps  

 

For the tWP, apply the corresponding equation:  

=> tWP = 100 ns - 50 ns  

=> tWP = 50 ns 

Any value less than the clock period works, for example:  

==> C_WRITE_MIN_PULSE_WIDTH_PS_0 = 10000 ps  

 

Below is the MHS snippet: 

 

BEGIN opb_emc  

PARAMETER INSTANCE = opb_emc_flash  

PARAMETER HW_VER = 1.10.b  

PARAMETER C_NUM_BANKS_MEM = 1  

PARAMETER C_INCLUDE_NEGEDGE_IOREGS = 0  

PARAMETER C_MEM0_WIDTH = 8  

PARAMETER C_MAX_MEM_WIDTH = 8  

PARAMETER C_INCLUDE_DATAWIDTH_MATCHING_0 = 0  

PARAMETER C_SYNCH_MEM_0 = 0  

PARAMETER C_READ_ADDR_TO_OUT_SLOW_PS_0 = 10000  

PARAMETER C_WRITE_ADDR_TO_OUT_SLOW_PS_0 = 10000  

PARAMETER C_WRITE_MIN_PULSE_WIDTH_PS_0 = 10000  

PARAMETER C_READ_ADDR_TO_OUT_FAST_PS_0 = 10000  

PARAMETER C_WRITE_ADDR_TO_OUT_FAST_PS_0 = 10000  

PARAMETER C_READ_RECOVERY_BEFORE_WRITE_PS_0 = 5000  

PARAMETER C_WRITE_RECOVERY_BEFORE_READ_PS_0 = 5000  

PARAMETER C_OPB_CLK_PERIOD_PS = 25000  

PARAMETER C_DEV_MIR_ENABLE = 0  

PARAMETER C_BASEADDR = 0xFF7FFFE0  

PARAMETER C_HIGHADDR = 0xFF7FFFFF  

PARAMETER C_MEM0_BASEADDR = 0xFF800000  

PARAMETER C_MEM0_HIGHADDR = 0xFFBFFFFF  

PORT Mem_A = opb_emc_flash_Mem_A  

PORT Mem_RPN = opb_emc_flash_Mem_RPN  

PORT Mem_DQ = opb_emc_flash_Mem_DQ  

PORT Mem_WEN = opb_emc_flash_Mem_WEN  

PORT Mem_OEN = opb_emc_flash_Mem_OEN  

PORT Mem_BEN = opb_emc_flash_Mem_BEN  

PORT Mem_CEN = opb_emc_flash_Mem_CEN  

BUS_INTERFACE SOPB = myopb_v20  

END

AR# 18223
Date Created 09/03/2007
Last Updated 05/16/2014
Status Archive
Type General Article