AR# 18490: Synplify Pro - How do I use an EDIF file from CORE Generator or ngc2edif?
Synplify Pro - How do I use an EDIF file from CORE Generator or ngc2edif?
How do I supply an EDIF file from either CORE Generator or ngc2edif to Synplify Pro?
Synplify Pro allows the input of EDIF files for timing evaluation. If you are instantiating an EDIF file in your design, then you can import the EDIF file into your Synplify Pro project:
1. Select "Add File...".
2. Select "All Files (*.*)" for "Files of Type:".
3. Add your EDIF file.
4. Select which HDL file will be the top-level file:
- Select "Impl Options...".
- Select the "Verilog" or "VHDL" tab.
- In the "Top Level Entity/Module" field, type in the top-level entity/module name.
- Select the "OK" button.
If you have an NGC file (some cores are in the NGC format, and XST produces NGC exclusively), run the "ngc2edif" tool on the NGC file. This will produce a file called a ".ndf". Follow the same procedures as above, including the following steps:
1. Right-click the newly inserted ".ndf" file and select "File Options...".