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AR# 18761

6.1i EDK, PLB_SDRAM_v1_00_c - Burst writes to incorrect location after crossing row boundary

Description

Keywords: SDRAM, PLB, address, burst

Urgency: Standard

General Description:
During burst transactions, data is written to incorrect addresses.

Solution

1

The maximum burst size of the plb_sdram_v1_00_c controller is set to 8192 bytes. Consequently, any write-burst with a row-rollover that crosses this boundary does not write the data above this boundary to the correct location. This is only observed in a write-burst with a row-rollover.

This problem is fixed in version plb_sdram_v1_00_d which will be released in the EDK 6.2i, Service Pack 1, scheduled for April 2004.

2

You can work around this issue as follows:

In the file $XILINX_EDK\hw\XilinxProcessorIPLib\pcores\plb_sdram_v1_00_c\hdl\vhdl\plb_sdram.vhd, modify the following lines (line numbers 372-372):

Change:

constant DEV_MAX_BURST_SIZE : integer := 8192;
constant DEV_BURST_PAGE_SIZE : integer := 8192;


To:

constant ADDR_OFFSET : integer := log2(C_SDRAM_DWIDTH/8);
constant DEV_MAX_BURST_SIZE : integer := 2**( C_SDRAM_AWIDTH + C_SDRAM_BANK_AWIDTH + C_SDRAM_COL_AWIDTH + ADDR_OFFSET);
constant DEV_BURST_PAGE_SIZE : integer := DEV_MAX_BURST_SIZE;
AR# 18761
Date Created 01/09/2004
Last Updated 03/08/2006
Status Archive
Type General Article