AR# 1909: Orcad Simulate - How do I use Xilinx's global reset and 3-state signals for functional simulation?
Orcad Simulate - How do I use Xilinx's global reset and 3-state signals for functional simulation?
Keywords: Simulate, global reset, 3-state, tri-state, signal, functional simulation
General Description: How do I use Xilinx's global reset and 3-state signals for functional simulation?
Xilinx has global signals that are used to set and reset flip-flops and initialize 3-state buffers. These signals are as follows:
GR - Global Reset for Xilinx 2K, 3K, and 5K families. GSR - Global Set/Reset for Xilinx 4K and 4K-E families. GTS - Global 3-state for Xilinx 4K, 4K-E, and 5K families.
These global signals will not be in the VHDL netlist created by Capture. Therefore, in order to simulate them functionally, you will need the latest Xilinx model files that are on the Orcad web site at:
The name of the file is "XLIB.ZIP," and it is password-protected. If you are interested in getting the updated model files, please e-mail Orcad at firstname.lastname@example.org, so they can give you the password.
There are two model files for each Xilinx family. One file contains the primitives for a particular Xilinx family and the other file, which has an _M in the name, contains the macros for a particular Xilinx family. Place any set of these files in your project as VHDL model files, and then load your project normally. When you create a stimulus for the design, you will notice a new context underneath your design context. This new context is where you can stimulate the global signals before you run a simulation.