UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 19360

XAPP290 - Appendix C of the Partial Reconfiguration Application Note includes an incorrect statement for the bus macro position

Description

Keywords: bits, XAPP, partial, reconfig, swap

Urgency: Standard

General Description:
In the Application Note (Xilinx XAPP290): "Two Flows for Partial Reconfiguration: Module Based or Small Bit Manipulations", Appendix C includes the following information:
5. If bus macro in leftmost position, bits 0 and 1 cannot go right-to-left.
6. If bus macro in rightmost position, bits 2 and 3 cannot go left-to-right.

Is this correct?

Solution

The bits referenced in Appendix C are incorrect and should be switched; the correct information is as follows:

5. If bus macro in leftmost position, bits 2 and 3 cannot go right-to-left.
6. If bus macro in rightmost position, bits 0 and 1 cannot go left-to-right.

This change will be made in the next revision of the Application Note.
AR# 19360
Date Created 09/03/2007
Last Updated 09/27/2008
Status Archive
Type General Article