When generating a processor design with 18 devices on the OPB bus, I receive the following error messages from the EDK design tools:
"opb_v20 (opb) - C:\system.mhs:150 - 1 master(s) : 226 slave(s)
ERROR:MDT - opb_v20 (opb) - C:\system.mhs:150 - more
than 16 slave(s) assigned!
ERROR:MDT - platgen failed with errors!
make: *** [implementation/ppc405_0_wrapper.ngc] Error 2"
This is not a limitation of the OPB bus, but rather an arbitrary limit to the number of slaves supported. This restriction can be removed as follows:
1. From the EDK install, copy the entire OPB bus peripheral to a local pcore directory inside of the EDK project directory or other pcore repository. The OPB bus core can be found in a path similar to C:\EDK\hw\XilinxProcessorIPLib\pcores\opb_v20_v1_10_b.
2. In the local OPB bus copy, open the OPB bus ".mpd" file in a text editor from the data directory of the core. The file path will be similar to C:\myproject\pcores\opb_v20_v1_10_b\data\opb_v20_v2_1_0.mpd.
3. Modify the attribute OPTION MAX_SLAVES = 16 to be a larger number.
4. Save the file.
5. Close and re-open XPS.
NOTE:MAX_SLAVES values other than 16 have not been extensively tested by Xilinx. This solution applies to the opb_v1.10.c Core.
Alternatively, you can solve this issue by having a second OPB bus in the system and placing the extra peripherals on this bus. Using a second OPB bus in this way requires the use of an OPB-2-OPB bridge.