AR# 19505

8.2 System Generator for DSP - Why are there back annotation simulation mismatches when simulating a reloadable DA FIR?

Description

Why are there back annotation simulation mismatches when simulating a reloadable DA FIR?

Solution

The problem is that there are errors on the RFD initially, which cause a mismatch on the valid out and data outputs of the same block. The errors are seen in short little bursts, then the simulation gets back on track again.

AR# 19505
Date 05/16/2014
Status Archive
Type General Article