We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 19541

6.3i Timing Virtex-4 - Block RAM clock-to-out paths are not reported


General Descritpion:

The Block RAM clock-to-out paths in Virtex-4 are not being reported in the timing reports.


This is scheduled to be fixed in the next major release of the design tools.

AR# 19541
Date 01/18/2010
Status Archive
Type General Article
Page Bookmarked