AR# 19839: 7.1i ISE - Project Navigator is closed down every time a source file is saved
7.1i ISE - Project Navigator is closed down every time a source file is saved
Keywords: ISE, 6.2, SP3, Verilog, project, close, recursive, loop
Every time any file in a Verilog project is saved, the ISE Project Navigator closes. If launched again, Project Navigator can successfully open the same project. The latest modifications have been saved, and the design can be implemented. However, if the design files are saved again, Project Navigator closes down again.
No error message or warning is given when the software exits.
How can I solve this problem?
This behavior has been seen to be caused by Verilog module(s) defined in the top-level file of the project, but instantiated into a file on a lower level.
To solve the problem, you can either:
1. Cut and paste the module(s) definition into the same file(s) they are being instantiated in.
2. Save each module definition into a separate file and then add the resulting files into the project.