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Foundation XVHDL: message "No entity bound to this instance"
KEYWORDS: foundation vhdl entity instance bound
While synthesizing an XVHDL design in Foundation, the
following warning may appear in the Project Manager (and in
Synthesis -> View Report):
component: U1 : No Entity bound to this instance.
This warning will be issued whenever XVHDL cannot locate a
VHDL description of an instantiated component.
There are two cases when you can safely ignore this warning:
1. You have instantiated Xilinx primitives in your VHDL
2. You have created the netlist file for the instantiated
component. Examples are:
2a. You have compiled the VHDL source for the component
2b. The netlist for this component comes from a non-VHDL
source (schematic, ABEL, Logiblox, etc.)
In this case, TRANSLATE will combine the netlist files
correctly, as long as all netlist files are copied into the
project directory and are named correctly.
If neither of these conditions applies, make sure that all
VHDL source files are visible to the XVHDL compiler:
1. If this is a top-level VHDL project, add all of your .VHD
files to the project (in Project Manager, select Document
2. If this is a VHDL macro, declare all lower-level VHDL
files as user libraries.
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