I have a series of LUT buffers that I created using the KEEP attributes. However, when I load the NCD into Floorplanner to view the placement information, the buffers do not show up even though I can find them in FPGA Editor. Additionally, the nets between the buffers show up in Floorplanner, but they are greyed out. Why does this happen?
The issue of greyed-out nets and missing logic occurs when there is a mismatch between the NGD (logical design names) file and the NCD (physical design names) file.
You can resolve this issue by loading just the NCD file into Floorplanner, so no logical information exists. To do this, follow the steps below:
1. With the Ctrl key pressed on your keyboard, select File --> Open and load the ".ngd" file. This should automatically locate the ".ncd" file as well.
2. With the Ctrl key still pressed, delete the text box with the location of the ".ngd" file. Leave the location for the ".ncd" file as it is.
3 Press OK.