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# AR# 20459

## Description

Keywords: COREGen, CORE Generator, input

Why is the output width in the core GUI larger than the output of the generated HDL, and why does it cause a Java error?

For example, core generation fails when you enter the following:

InputWidth = 12
ResultWidth = 30

The error I receive is similar to the following:

"ERROR:coreutil - FATAL: Port DOUT: external net width (30) does not match the
port width (23).
ERROR:coreutil - An internal error has occurred. To resolve this error, please
consult the Answers Database at http://support.xilinx.com
ERROR:coreutil - Failure to generate output products"

## Solution

The 2-D DCT GUI shows the absolute maximum bit width for Result Width, instead of using the maximum bit width Internal Width.

The equations are:
Equation 1: MAX { Internal Width } = Input Bit Width + IsInputUnsigned + Coeff Bit Width + log2(8)

Equation 2: InternalWidthSelected = MAX {Internal Width } , for full precision

Equation 3: MAX { Result Width } = InternalWidthSelected + Coeff Bit Width + log2(8)

Where:
MAX { x } = Function to find the MAX value of the variable x
IsInputUnsigned = 1,if the input is selected as Unsigned, else = 0
InternalWidthSelected = Variable which defines the internal width. (This value will be less than or equal to the value returned by equation 1.)

For example:
Input Width = 8
Coeff Width = 8
Input = Signed
MAX { Internal Width } = 8 + 0 + 8 + 3 = 19

Select Precision to be Truncate/Round,
Select the internal width = 16 (This should be less than 19, otherwise, the GUI will not show the number in red.)
Now:
MAX { Result Width } = 16 + 8 + 3 = 27

However, the GUI currently shows the maximum result width based on maximum internal width and not the selected internal width. Hence, the GUI shows 19 + 8 + 3 = 30. So it does not show the number in red, if the number is larger than 27 but smaller than 30 and the generation fails.
AR# 20459
Date 07/26/2007
Status Archive
Type General Article
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