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AR# 20483

6.3i CORE Generator - "ERROR:NgdBuild:76 given for Core Generator .ngc file."


Keywords: ngc, edn, edif, merged, block, NGDBuild, xfft_v3_0, xfft_v2_0, gig_eth_mac_v4.0, cam_v3_0, 8b_10b_encoder_v4_0, 8b_10b_decoder_v4_0, fifo_generator_v1_0, pin renaming, bus format, BI

Urgency: Standard

General Description:
NGDBuild fails on a design with an IP core and gives an error message similar to the following:

"ERROR:NgdBuild:76 - File "proj/gig_eth_pcs_pma_v4_046516_dlink_gpcs_pma_gen_1.ngc" cannot be merged into block "gig_eth_pcs_pma_v4_046516_dlink_top/BU2"
(TYPE="gig_eth_pcs_pma_v4_046516_dlink_gpcs_pma_gen_1") because one or more pins on the block, including pin "tx_code_group9:0(0)", were not found in the file."


There is a problem with the COREGen netlister regarding pin renaming of bus connections between ".ngc" sub-modules and the top-level EDIF file. This problem is experienced with the following cores when BusFormat = BusFormatNoDelimiter was used:


The problem is that there is a cell definition in the top-level EDIF for the NGC sub-module, with ports that are defined as follows:
(port ( array ( rename din "din7:0") 8 ) (direction INPUT))

That is, the ports are defined as arrays, but there are no "bus-delimiters" used (resulting in an invalid declaration).

If a different bus format is used (for example B< I >), the same declaration looks like:
(port ( array ( rename din "din<7:0>") 8 ) (direction INPUT))

To fix this problem, select a bus format other than BI (BusFormatNoDelimiter).
NOTE: The busformat BI will be deprecated in the 7.1i. This means that it will still be an option, but Xilinx suggests that no new cores be created with the option. The busformat BI will be removed from the next major release (after 7.1i).
AR# 20483
Date 03/20/2006
Status Archive
Type General Article