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AR# 20484

What is the strength or value of the internal pull-up, pull-down, keeper or bus hold circuit?


What is the strength or value of the internal pull-ups, pull-downs, or keeper (bus hold) circuit in Xilinx I/Os?


The keeper circuit uses the same pull-up and pull-down resistors that can be enabled separately in the SelectIO block. 

The strength of these pull-up/down resistors is typically defined in the "(Xilinx device family) Data Sheet: DC and Switching Characteristics" document, typically as a current strength based on the VCCO voltage level (search for IRPD and IRPU in the device data sheet DC and AC Characteristics).

Note: For the older Spartan-3 family, additional information on the strength of these internal pull-up/downs is found in (Xilinx Answer 19024). For the CoolRunner-II family, see (Xilinx Answer 16851).

AR# 20484
Date 04/29/2014
Status Active
Type General Article
  • SoC
  • FPGA Device Families
  • CPLD Device Families
  • Mature Products
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