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AR# 20561

LogiCORE PCI Express - When using the PCI Express core, how do I know what the BAR or other configuration space settings are?


General Description:

I need to be able to obtain the values of BAR0, BAR1, and BAR2 so that I can decode which memory region is being accessed. How can my user logic decode which of three possible memory regions an access is referring to?


The BARs can be read through the configuration interface. Please refer to the PCIe Design Guide section "Accessing Additional Registers Through the Configuration Port" for information on reading registers in the configuration space. Figure 4-14, Example Configuration Space Access, shows the waveform.

Using the cfg_dwaddr port, you supply a DWORD address for the BAR and the core will put the value on the cfg_do on the next cycle. You have to present these address as DWORDS not bytes.

For BAR0 it would be address 04h (10h is the byte address) BAR1 would be address 05h (14h is the byte address) etc.

To read the BARs, create a state machine that continually reads the BAR registers and shadows this information in your user application. You will want to do the reads continually because the host resource may reallocate the address space at some point during the operation.

Reference: LogiCORE PCI Express v2.0 Design Guide, UG040 (2.0) October 10, 2003.

AR# 20561
Date 12/15/2012
Status Active
Type General Article
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