CLKFX fails when CLKIN_PERIOD is set to the correct value. Why does CLKFX start to work if CLKIN_PERIOD is set to a different value? At higher temperatures, this problem appears on more devices.
The problem occurs only for certain CLKIN_PERIOD and M/D value combinations. We have seen this issue specifically in cases where the input clock is 40 MHz, with M=4, D=1. When CLKIN_PERIOD=25ns, CLKFX does not toggle. Modifying CLKIN_PERIOD or increasing/decreasing the input clock frequency can cause CLKFX to start toggling. This is caused by an issue in the BitGen software which causes a DCM bit to be set incorrectly for certain CLKIN_PERIOD values in Virtex-II and Virtex-II Pro designs. This problem is fixed in 7.1i sp2 design tools.
Currently, to work around this issue, do the following:
Force the PLcentered bit for a specific DCM by using the hidden BitGen option "-g PLcentered_xMyN:0" where M and N are the X and Y coordinates of the DCM.
For instance, to force the Plcentered bit for DCM_X2Y1 to zero, use "-g PLcentered_x2y1:0".
This option changes a bit setting specific to the DCM CLKFX generation.