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AR# 20893

6.3 EDK - "ERROR:MDT ../../mii_to_rmii_v2_1_0.mpd RANGE DRC is not performed"

Description

Keywords: ISE XPS, PARAMETER, Gmm12.3+1

Urgency: Hot

General Description:
When I use the MII_to_RMII Peripheral in my design and I click on generate Netlist in XPS, the PlatGen fails with the following error:

"ERROR:MDT -
C:\%EDK%\hw\XilinxProcessorIPLib\pcores\mii_to_rmii_v1_00_b\data\mii_to_rmii_
v2_1_0.mpd:30 - Can not compute RANGE ('0:1'), as specified in MPD, for
PARAMETER C_FIXED_SPEED. RANGE DRC is not performed
ERROR:MDT -
C:\%EDK%\hw\XilinxProcessorIPLib\pcores\mii_to_rmii_v1_00_b\data\mii_to_rmii_
v2_1_0.mpd:31 - Can not compute RANGE ('0:1'), as specified in MPD, for
PARAMETER C_SPEED_100. RANGE DRC is not performed

Running UPDATE Tcl procedures for OPTION PLATGEN_SYSLEVEL_UPDATE_PROC...
ERROR:MDT - platgen failed with errors!
make: *** [implementation/ppc405_0_wrapper.ngc] Error 2
Done."

How can I solve this problem?

Solution

The core's parameter range syntax in the MPD file is causing the error.

To fix the problem, open the MPD file. You will find the following lines:

## Generics for VHDL or Parameters for Verilog
PARAMETER C_FIXED_SPEED = 1, DT = std_logic, RANGE = ('0:1')
PARAMETER C_SPEED_100 = 1, DT = std_logic, RANGE = ('0:1')

Change the lines to the following:

## Generics for VHDL or Parameters for Verilog
PARAMETER C_FIXED_SPEED = 1, DT = std_logic, RANGE = (0:1)
PARAMETER C_SPEED_100 = 1, DT = std_logic, RANGE = (0:1)
AR# 20893
Date Created 03/02/2005
Last Updated 04/12/2007
Status Archive
Type General Article