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AR# 20900

LogiCORE FIR Compiler v2.0 and MAC FIR v5.1 - Why does the RFD signal not assert after resetting the MAC FIR, when used as a decimation filter?

Description

Why does the RFD signal not assert after resetting the MAC FIR, when used as a decimation filter?

The MAC FIR core has been superceded by the FIR Compiler, which should be used for all new Virtex-4 designs.

This problem still affects the FIR Compiler for MAC Based FIR Filters that target the following architectures:

Virtex-II, Virtex-II Pro, Spartan-3, Spartan-3E, Spartan-3A

Solution

The Data Sheet says that the reset is asynchronous, but due to a bug in the core, you must apply a multi-cycle synchronous reset, when generating a decimating FIR filter.

There are several way to work around the problem:

(Solution 1 is the recommend reset solution.)

1. Hold the reset for long enough to flush the core control signals. The Reset Pulse Width is equal to the Decimation Rate * Number of Channels.

For example: If Decimation Rate = 12 and Number of Channels = 10, then Reset Pulse Width = 12 * 10 = 120 clock cycles.

2. Only apply a reset, when the core is not processing any data. This would require waiting for the RFD signal to be asserted by the core and de-asserting the ND signal until a reset is complete.

3. If the reset is at startup, then you would need to keep ND de-asserted, until the reset is complete and RFD has been asserted.

AR# 20900
Date Created 09/04/2007
Last Updated 12/15/2012
Status Active
Type General Article