How do I utilize the parity bits in my design? When was support added for 18-bit data width block RAM?
As of ISE 7.1, Data2MEM does support 18-bit data widths.
You will need to add a BMM and MEM file to the top level of your ISE project. The BMM should contain syntax to describe the instantiation of the block RAM you instantiated.
An example BMM file is:
ADDRESS_SPACE picoblaze1 RAMB18 INDEX_ADDRESSING [0x00000000:0x000003FF]
In the above BMM file example, the name "picoblaze1" could be anything. Further, the label "top/picoblaze1/myram" is the instantiation name of the block RAM with complete hierarchy. To obtain the instantiation name of the block RAM, you could run the implementation tools once and then open up FPGA Editor to see the complete instantiation name of the block RAM.
The second file you have to add to the Project Navigator project is a MEM file. A MEM file is essentially a HEX file (output from KCPSM assembler) with "@0" as the first line. Currently, you must create the MEM file by hand from the HEX file.
Each time the time stamp of the MEM file changes, the "Generate Bitstream" task becomes unchecked in Project Navigator. Run "Generate Bitstream," a bitstream will be generated with the updated values without running through Synthesis/Translate/MAP/PAR.
With this added support, Data2MEM can now update PicoBlaze code within the bitstream