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AR# 21528

7.1i XST - "ERROR:Xst:2037 - Unit <stdcfg1>: Several tristates on signal <data<3>> are sharing the same enable signal <N1>"


Keywords: three, 3-state, buffer, tristate2logic

Urgency: Standard

General Description:
Tristate2logic is a new feature in XST. Tristate2logic allows XST to map HDL code that infers tristate buffers to change the tristate to logic (into multiplexer-type logic). This property is not available for Spartan-3, Virtex-4, and newer families. XST transforms internal tristates to logic. In some cases, XST will not transform tristates to logic because it might lead to incorrect design behavior. For these cases, XST issues an error message:

"ERROR:Xst:2037 - Unit <stdcfg1>: Several tristates on signal <data<3>> are sharing the same enable signal <N1>"



XST work-around for the older device families:

To turn off this feature in ISE, perform the following steps:
1. Right-click the Synthesize - XST option.
2. Select Properties....
3. Change the Property Display level to "Advanced".
4. With the Xilinx Specific Options tab forward, change "Convert Tristates to Logic" from "Yes" to "No".
5. Click OK.


After following the steps in Resolution 1, if the error message still occurs, then the issue is valid.

In ISE 7.1i, XST includes a new feature that checks for tristates sharing the same enable signal (this feature was previously included in MAP). This feature warns of a possible contention issue prior to getting to MAP. To fix this contention, check the connectivity of the tristates.

NOTE: If a port is declared as an INOUT, then all of the component ports that connect to that port must also be declared as INOUT.
AR# 21528
Date 01/08/2009
Status Archive
Type General Article