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AR# 21565

10.1 EDK - Where can I find information on the simulation of the Ultracontroller II?


I want to simulate the UltraController II reference design in (Xilinx XAPP575): "UltraController-II: Minimal Footprint Embedded Processing Engine." 


However, I cannot find any information on how to run this simulation.


Simulation of the UltraController II design is not supported because the design is implemented in the cache of the PowerPC, and the PPC SWIFT model does not support the preloading of the caches for simulation. 


The UltraController I is implemented in block RAMs, which is supported by the PPC SWIFT model interface; consequently, simulation is possible.

AR# 21565
Date 05/19/2014
Status Archive
Type General Article
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