When running a simulation of Aurora 2.3 in Virtex-4, the LANE_UP and CHANNEL_UP signals never go high. I generated the core in COREGen 7.1.02i.
The REFCLK to Line Rate ratio is causing the problem. REFCLK must be divided by 10, 20, or 40 of the line rate. However, in the COREGen GUI, the only options for divisors of the Line Rate when choosing a REFCLK are 8, 16, and 32. These options will not work since Aurora 2.3 uses 8B/10B encoding.
Using Aurora at 3.125 Gbit/s.
The following REFCLK values will work (MHz):
312.5 - Divide by 10
156.25 - Divide by 20
The following REFCLK values will not work (MHz):
390.625 - Divide by 8
195.313 - Divide by 16
97.656 - Divide by 32
78.125 - Divide by 40, OK, however, this is lower than the minimum specified REFCLK frequency of 106 MHz, see (Xilinx Answer 21130).