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AR# 21633

7.1i ISE Simulator (ISIM) - Typing a Step command prior to a Run command runs only up to 0 ns and indicates "initialization done"


Keywords: ISE Simulator, ISIM, generated, VHDL, Verilog, schematic, Step, Run, Initialization

Urgency: Standard

General Description:
When I use the "Step" command and then use "Run", it runs only up to 0 ns and indicates "initialization done".


This is a problem with ISE Simulator, where it is still trying to initialize the simulation when the Run command is issued.

To work around this issue, type "run <time>" again in the console and the simulation will run to the specified time.

This issue is fixed in ISE 9.1i.
AR# 21633
Date 10/16/2008
Status Archive
Type General Article
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