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AR# 21976

LogiCORE SPI-4.2 (POS-PHY L4) Lite v3.0 - Locked_RDClk is undefined in simulation

Description

For Sink user clocking mode, the Locked_RDClk signal is undefined for the duration of simulation.

Solution

This issue has been resolved in SPI-4.2 v4.1 Core.

AR# 21976
Date Created 09/04/2007
Last Updated 05/19/2014
Status Archive
Type General Article