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AR# 22020

8.1i EDK - An error occurs when I run compedklib with ModelSim 6.1 or ModelSim 6.1a


When I run compedklib with ModelSim 6.1 or ModelSim 6.1a, the following error occurs:

" vcom -93 -quiet -force_refresh -work opb_ethernet_v1_02_a

** Fatal: Unexpected signal: 11.

** Error: libs/opb_ethernet_v1_02_a/dacheck/implementation.dat(320): VHDL Compiler exiting"


The error is the result of a change made in ModelSim 6.1 and ModelSim 6.1a.

This error is fixed in ModelSim 6.1b.

AR# 22020
Date 12/15/2012
Status Active
Type General Article
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