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AR# 22048

LogiCORE SPI-3 PHY v4.0 - A 32-channel (or more) polled core fails timing

Description

Urgency: Standard  

 

General Description: 

A 32-channel (or more) polled SPI-3 PHY Core fails timing in PAR.

Solution

If the system timing budget cannot permit this input setup to be relaxed, a solution is for the Link device to poll the PHY Core by holding TADR to the same value for 2 cycles, and then only sample the value on PTPA 2 cycles later (the result that comes 1 cycle later should be discarded). 

 

Other solutions are being investigated.

AR# 22048
Date Created 09/04/2007
Last Updated 05/19/2014
Status Archive
Type General Article