We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 22182

Spartan-3 / -3E / -3A / -3AN / -3A DSP, DCM - What is the phase error between CLKFX and CLKFX180?


The data sheet includes a CLKOUT_PHASE parameter that defines the phase offset between CLK0 and the DFS output. What is the phase offset between CLKFX and CLKFX180?


CLKFX_180 is not a phase-shifted version of CLKFX; it is simply CLKFX inverted. Therefore, the phase error between CLKFX and CLKFX180 will be minimal. The delay associated with the inverter can be safely ignored.

The phase offset of CLKFX180, in respect to CLK0, will depend on the phase offset of CLKFX (defined by CLKOUT_PHASE in the data sheet) and the duty-cycle of CLKFX (defined by CLKOUT_DUTY_CYCLE_FX in the data sheet). The duty-cycle will be very close to 50/50 at the DFS output.

If CLKFX and CLKFX180 are used as a complimentary clock solution, such as with DDR, their 180 degree shift should be maintained.

The Spartan-3 DC and Switch Characteristic Data Sheet is located at:


AR# 22182
Date 12/15/2012
Status Active
Type General Article